| With the shrink of IC critical dimension, the material property of inter-layer also had a significant development to meet the demands. The multiple-metal-layer was applied to reduce the RC delay time. The big challenge is the new material of the inter layers:the low-resistance Cu and low-K IMD material. Cu has replaced the Cu-Al alloy and W plug. As to the new material of IMD, FSG (fluorinated. silicate-glass) is one of it, which this paper will emphasize on.The FSG process deposited with CVD method had a big development. The F in the SiO2can reduce the K value to about3.5, and improve the gap filling ability. Therefore, FSG has got more and more popular. This paper will do some research on the relationship between silicon wafer and FSG film quality, which seems no direct interaction.Silicon wafer is the basic material for the IC manufacturing. Now the most popular diameter is200mm. The300mm diameter wafer has also been devoted into manufacturing now. Precise process control demands more and more precise silicon wafer control.During the manufacturing, process of lapping and etching will induce the different backside status of silicon wafer. The backside status is not a regular parameter in normal control. However, here we’re dedicated to do some research for the silicon wafer backside and FSG buuble defect.In the manufacturing practise, the free fluorine in FSG released in the high temperature process, will affect the metal layers and cause FSG bubble defects, casued big loss. And during our experiments and practise, we found that with certain temperature and equipment, the silicon wafer will affact the FSG CVD process, and caused FSG bubble.This subject intend to do some research for the property of HDP process and silicon wafer, try to find out the affection, and give out a new resolution for FSG bubble. |