SEMM: A Scheduler For Embedded Master-slave Multi-core Microprocessors

With the fast development of embedded technology, people dependmore and more on embedded devices, such as mobile phones and tabletcomputers. Traditional single-core microprocessors cannot satisfy people’sincreasing requirements any more, thus an emergent trend is theapplication of multi-core technology into embedded devices to improve thedevices’ computing ability.This paper describes SEMM (A Scheduler for EmbeddedMaster-slave Multi-core Microprocessors), a multi-core scheduling systemtargeting embedded applications running on a master-slave multi-corestructure. We implemented our scheduler at the thread level, where trueparallelism is realized. Our design focuses on the inter-process andinter-thread communication at both the hardware and software levels, andpays particular attention to the memory management in the master-salvemulti-core environment.We additionally design and implement HEP (Hardware EmulationPlatform) as the underlying operating environment for SEMM.Experiments on this32-bit RISC multi-core emulation platform showthat our scheduler is feasible and its performance is obviously much betterthan that of a single-core microprocessor.