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The Iris Recognition System Communication Module And The Design Of The Fpga Module

Posted on:2013-07-01Degree:MasterType:Thesis
Country:ChinaCandidate:X T MaFull Text:PDF
GTID:2248330374486010Subject:Signal and information processing
Abstract/Summary:PDF Full Text Request
As a highly reliable technology Iris recognition technology has become a research hotspot in recent years.Embedded iris recognition system is an implementation of iris recognition technology in embedded devices. Embedded recognition systems generally use a single DSP or embedded processor to complete all the algorithms. In these single-core processor-based systems, because of the lack of processing ability and hardware resources,these systems often can’t do the fast matching and manage large databases. In order to improve the disadvantage we designed TMS320DM6446and Cyclone Ⅲ FPGA dual-core processing architecture, the DSP is responsible for the part of the main algorithms, parallel processing FPGA is mainly responsible for the iris preprocessing,matching,the communication between the peripheral modules, and the management of the databases.The main types of work are as follows:We designed an embedded iris recognition hardware platform, including the communication module of the TMS320DM6446processor, Cyclone III FPGA, SDRAM memory system, Ethernet and USB2.0. And also involves the driver of each module.Writting Verilog program and making system simulation, synthesis and board-level testing of the program.We designed a kind of hardware architecture to adjust the grayscale of the picture.We used the FPGA resources to design a large-capacity memory control interface, to improve the capacity of the iris database and to improve the interaction interface for the system.Finally, the system is an efficient and fast embedded iris recognition system, each module works stable, and the system has a intuitive man-machine interface.
Keywords/Search Tags:Iris recognition system, Cyclone Ⅲ FPGA, TMS320DM6446, parallelmatching
PDF Full Text Request
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