IRIG_B Coding And Decoding System Design And Implementation With FPGA

"Unified time system" is a complete set of electronic equipment which provides standard time signals and frequency signals, it is widely used in various fields, including aerospace, satellites, navigation, positioning, communication and others.In this paper, we first briefly introduce the theory and development of the "unified time system", and then illustrate the decoding and encoding principle of IRIG_B (Inter Range Instrumentation Group). Based on these, a new hardware implementation with Altera FPGA of encoded and decoded technology in IRIG_B has been completed.Altera DE2-115development board based on the latest FPGA technology is used to complete the design. Moreover, details on the design scheme of encoding and decoding system are discussed from the aspect of engineering practice. First, the encoder part is realized by both using hardware description language and calling the IP core. Thus, its stability is improved. Second, the decoder part is completed by building SOPC system with Nios II embedded soft-core processor so that the effect of hardware and software collaboratively working is achieved. All these simplify the control function and save resource at the same time. Third, IRIG_B codec is integrated into a single piece of FPGA chip in the entire design, which makes the device able to both decode and encode. What’s more, it’s possible to simplify the testing of the system and get has a higher practice value as well. Fourth,1PPS pulse generated from the signal of atomic clock processed by FPGA is use as the time reference in this design. By doing this, the clock jitter is reduced and also the accuracy is approved.Through lots of real experiments, the whole encoding and decoding system has a normal operation, precise timing, convenient manipulation and stable and reliable performance, which reaches the design purpose.