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Preliminary Study Of Algorithms Of Signal Processing For BESⅢ MDC Electronics

Posted on:2012-10-03Degree:MasterType:Thesis
Country:ChinaCandidate:Q L ZhangFull Text:PDF
GTID:2248330371464453Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
BESIII detects particles generated by electron-positron collision by mean of measuring all the information captured by the detectors. MDC is one of the sub-detectors of BESIII. This paper mainly discussed possible methods of preliminary studies for Signal Processing of BESIII MDC Electronics. The noise rate of inner main drift chamber wires is ultra high which has an strongimpact on baseline drifting. It is an important issue to solve the problem of baseline drift and to obtain a actual real time signal based on a stable baseline. This paper details the types of digital filters, principles, implementations and several commonly used window functions.Appropriate type of filer is chosen according to Matlab simulation result. Two different implementation schemes are discussed.One is MSP430 MCU-based scheme while the other is FPGA-based implementation. This paper details the types of digital filters, principles, implementations and several commonly used window functions, Chooses the appropriate type of filer by Matlab according to the real situation,and introduces two ways to implement the Digital signal processing algorithms of MDC which are MSP430 MCU-based and FPGA-based implementation.For MSP430 MCU-based scheme,this paper describes the characteristics, principles, functions of the microcontroller in detail and also introduces the design process of this implementation.On this MCU system, we implemented a FIR digital filter with 64 steps, completing the real-time digital signal waveform fitting to signals. After filtering,the results are finally stored into EEPROM so as to be readout later.For FPGA-based algorithm,this paper describes the characteristics, principles of FPGA and digital filters and introduces a variety of implementations on FPGA.We complete the design in the integrated structure of parallel and serial of distributed algorithm on Xilinx Virtex4 board. The data are readout by Labview and finally analysed by Matlab.At the end of this paper,we compare the two ways of implementations,analysis their advantages and drawbacks. The conclusion is that the FPGA-based implementation is more suitable for signal processing in BESIII MDC. This algorism can also be applied to other high-speed waveform sampling systems.
Keywords/Search Tags:FIR Digital Filter, Distributed Algorithm, Waveform fitting
PDF Full Text Request
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