With the increasing technological complexity and integration level of the digital system, it is becoming more and more difficult for device test in Digital system. BIST technology has been widely used in digital circuit’s test with the advantage of self-test ability. However, there are a series of problems in the testing process with BIST such as excessively long sequences ,low coverage rate of testing faults and so on.Therefore, we,in this study, pay particular attention to the program that not only can enhance coverage rate of testing faults ,but also shorten the length of testing sequences.The research approach of the study is as followings: Considering the encoding mode and fitness distribution mechanism, we have introduced Non-dominated Sorting Genetic Algorithm II (NSGA-II) based on the research of the optimization of multiple objects. Then, getting the regular collection of CA by employing NSGA-II, we’ve obtained the CA structure. Meanwhile, to make sure that each testing sequence can detect different faults as many as possible, we obtain the pre-determination distance sequence by structuring the most hamming distance and presetting cartesian distance. By adopting all the measures above, it maintains the balance between the coverage rate of testing faults and the length of testing sequences, realizing the optimization of BIST test vectors generation.According to the design and the studied algorithm, the topic verified with ISCA’85 Benchmark, and the results show that the test generation method ensure coverage rate of testing faults above 99% and shorten the sequence length, and have advancement and... |