Font Size: a A A

The SOC Design Of AIS Controller Based On FPGA

Posted on:2013-01-18Degree:MasterType:Thesis
Country:ChinaCandidate:X Y WangFull Text:PDF
GTID:2232330371970648Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
In contemporary society, in which the economy has been rapidly developed, and the number of ships has been highly increased, the ocean transportation safety is becoming more and more significant; the concept of AIS system has been raised at this background. IMO meeting in 2000 passed the proposal about mandatory installation of AIS equipments; all related ships must install AIS equipments, so AIS ship-borne equipments have played an important role of marine electronic equipment. The core chips of AIS equipments almost wholly depend on imports in our local market, so studying and capturing the key technologies of the AIS-core chip, and developing with independent intellectual property of AIS equipments is in urgent needs in the development of China’s marine electronics industry. The research is proposed by the context.The thesis is based on the detailed analysis of the theory and composing of AIS system and the theory of the AIS device, with the feature of the FPGA which is high speed processing, short product cycle and low product cost as well as the feature of Verilog language and C language which fits well in the work of software and hardware circuit programming; introduces a on-chip system SOC as the core part of the AIS system which implements the modulation and demodulation of AIS information. The process of implement is as follows:(1) According to the design requirements of the AIS system in the ITU-R M.1371-4 proposal, this thesis proposes a theoretical scheme for the modulation and demodulation technique of AIS information and analyzes the advantages and drawbacks of the various modulation and demodulation scheme, finally determines the modulation and demodulation method for the practical application of the AIS system.(2) Using the Verilog language and C language programming hardware circuitry and software calculation, with the hardware and software co-design methods, modulation and demodulation functions are simulated in the platform of ISE 12.3 and EDK 12.3 software environment.(3) If the simulation results are correct, the program can be downloaded to the Xilinx Spartan-3E starter experiment circuit board to run and test the system. The results of the modulation are directly observed through analog output form by using the Tektronix TDS 2012B oscilloscope. The results of the demodulation can be observed on the PC screen by using serial debugging assistant.After the hardware being debugged, the program has been embedded in the PROM. It can be run independently after the experiment circuit board power is on and system is reset.This research is based on part of the National Support Program"Key technology and system development of AIS/GNSS navigation device" undertaken by the Navigation Institute.
Keywords/Search Tags:AIS equipment, EFPGA, MicroBlaze, modulation, demodulation
PDF Full Text Request
Related items