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The Design Of A Portable Ultrasonic Testing System Based On FPGA

Posted on:2013-03-26Degree:MasterType:Thesis
Country:ChinaCandidate:X W LiFull Text:PDF
GTID:2232330362468507Subject:Instrument Science and Technology
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With the development of technology and society, demand for product qualityrequirements in the industrial production and people’s living is getting higher andhigher. The ultrasonic nondestructive testing technology conforms to the needs of thecommunity precisely and has been applied to product quality inspection, productionprocess supervision, material properties assessment areas widely. As the extensions ofapplication field in ultrasonic testing technique, digital ultrasonic detector is alsomoving toward the development of intelligence, miniaturization, serialization, theimage of the direction.SOPC(System On Programmable Chip) technology is an embedded technology,which is a new technique in recent years. Its emergence makes the feasibility ofpersonal custom chip system come true and promotes the developent of theminiaturization of electronic products. Nios Ⅱ system is the system based on SOPCtechnology which can be configured.This dissertation aims to design a portable ultrasonic non-destructiveinstrumentation for the control of the core to the FPGA(Field Programmable GateArray) and the Nios Ⅱ. The main contents are listed as follows:(1) The design of ultrasonic excitation module. Consider the EMC and theportability, the system use the multi-cycle square wave as excitation signal. Thehardware incorporates the switching power supply technology and the high-voltagepower MOSFET drive technology, makes the module more smaller and more reliable;(2) The design of acquisition circuit. Using FPGA as the controller, makes themodule more smaller. Acquisition circuit can filter out high frequency noise andimprove the signal-to-noise ratio of the received signal, because of containing atwo-stage programmable gain circuit and a Low-pass filter;(3) The design of FPGA. Embeding the NIOS Ⅱ core in the FPGA, and usinghardware description to design the high-speed acquisition driven-part and theultrasonic excitation driven-part, makes the system more Reliable;(4) Program design based on the Nios Ⅱ processor. Coordination and control ofsystem, the LCD control and the key detection are achieved by the software. Thetime-domain waveform compression algorithm and the average filtering algorithmhave been optimizated, and also be achieved by the software; (5) the system has reached the design requirements, and can be applied to theactual testing,by the test of the system and the experiment of the thicknessmeasurement and the bolt length measurement.
Keywords/Search Tags:ultrasonic detector, FPGA, SOPC, Nios Ⅱ, digital
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