Research And Design Of Synthetical Multi-protocol Conversion System Based On FPGA

Different safe communication equipment or safe information network currently use different communication protocols because of the difference in using background and requirement. Difference in protocol prevent the interconnecting of networks, also let the safe communication equipment that use different protocol can't access to network. One important solution to this problem is the conversion of protocols. In this paper we design a multi-protocol conversion system based on FPGA, this system could realize the conversion of any two protocols between E1,V.35,RS449,A and D protocols that use in field operation network,RS232.This system has series of good character such as low conversion delay and easy mode switch. This paper makes a deep research on the structure and key technology of the multi-protocol conversion system. The main work and achievement lists as follows:First, makes a deep research on the characters of the six communication protocols that contains in this system, including data frame, using mode and so on. Also compare the difference of these protocols. Analyze the structure and character of two embedded system based on FPGA. Introduce kinds of common methods using in protocol conversion, analyze the character of each method.Second, start from confirming the research goal of multi-protocol conversion system. Analyze the data link of multi-protocol conversion. Proposed a multi-protocol conversion system structure design based on FPGA after analyzing and comparing the structure of two typical multi-protocols conversion systems. The characteristic of this structure is that all data link is processed in hardware in protocol conversion and the control unit could configure every function module separately. This structure could realize multi-protocol conversion easily and effectively with low delay.Third, analyze and realize three key technologies of multi-protocol conversion system include communication rate matching, convert matrix and framed E1.Design and realize communication rate matching module and convert matrix combining character of protocols and system structure. Design and realize framed E1 after analyzing the clock and data frame of E1.In the end of this paper, we realize a prototype system using chips such as FPGA and MPC875 embedded CPU,giving a verification of the structure and key technology design. The test result shows that this system could realize multi-protocol conversion.