Font Size: a A A

Research On Key Techniques Of PLD Security Flaw's Simulation And Emulation

Posted on:2012-02-22Degree:MasterType:Thesis
Country:ChinaCandidate:Y SongFull Text:PDF
GTID:2218330371962548Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
PLD (Programmable Logic Device) is one of the core chipsets of modern electronic equipment. The research on PLD security flaw is beneficial to discover and clear the security flaw in digital device, which has great practical significance in both theory research and application perspective.Taking the research on National"863 Project"(2009AA01Z434) as background, this thesis mainly focuses on security flaw of PLD chips widely used in the electronic equipment at present, deeply analyzes characteristics and working mechanism of PLD security flaw, and constructs a PLD security flaw emulation platform. Moreover, emulation tests are carried out. Major contributions and innovations endeavored in this thesis are as follows:1. This thesis analyzes the similarities and differences between PLD security flaw and software malicious codes and the hierarchical taxonomy of PLD security flaw is proposed. On the basis of research on payload, trigger and hidden mechanisms of PLD security flaw, this thesis makes thorough analysis on the working mechanism of PLD security flaw. A threat model of PLD security flaw is established based on PLD industry chain process.2. A variety of structures of security flaw experimental equipments is analyzed and makes research on the limitations of emulation using these equipments. Combined with the characteristics of PLD security flaw,this thesis designs an implementation scheme of PLD security flaw platform based on PC architecture. This thesis also discusses key techniques needed solving during the construction of platform.3. A PLD security flaw emulation platform are designed and implemented. The implementation of interface module, control module and the trigger module are described in detail. Taking emulation of three typical security flaws as an example, the process and methods of emulation of PLD security flaw are introduced. Finally, experiments are carried out to test the accuracy and stability of data transmission, effective of the three security flaws, hidden and triggers of security flaw. The results have proved the tenability of the theory and the validity of the platform.
Keywords/Search Tags:PLD, Hardware Security Flaw, Security Threat Model, PLD Security Flaw emulation Platform, Information Security
PDF Full Text Request
Related items