Research On Method Of Grain Feature Extraction Based On FPGA

With the wide application of machine vision, algorithm and hardware for image processing have made great progress. The preliminary work of image processing include pixel level operation, image filtering, edge detection and feature matching. These processings are characterized by large amount of data, high repeatability, memory consuming, requiring high processing speed and simple algorithm structure. The parallel processing structure of FPGA is particularly suitable for this kind of computation.China is a big country of grain production. But China's grain processing automation level is relatively backward. The main contents and conclusions of this dissertation are as follows:(1) Video output from FPGA to monitor and serial parallel convert of CameraLink data. Video output from FPGA to monitor must be in accordance with Extended Display Identification Data (EDID).Serial parallel convert of CameraLink data based on FPGA is implemented by pixel clock frequency multiplication and shift register.(2)Grain exterior features extraction base on FPGA. The design can extract single line grains exterior features including perimeter, area, length, width and RGB average. The design has improved MER algorithm used for length and width features extraction, which save a large amount of memory and reduce computation time.