Research Of Multimedia Enhancement Unit In The Embedded Processor

Performance, cost, power, flexibility and many other factors are considered in the multimedia technology of embedded application. Of many solutions, the embedded processor with media enhancement unit is a balanced one and has been widely received attention and research. Based on this background, this paper firstly research a variety of media operations and typical extended instruction sets, and then implement the media enhancement unit of the embedded processor, also a novel de-interlacing algorithm is proposed. The major research and innovations are summarized as follows:1. Research a variety media operations and typical extended instruction sets. This paper studies two important aspects of media technology which are codec and post-processing. MPEG2, MPEG4, H.264, scaling, de-interlacing and frame rate up-conversion are analyzed here including algorithm research, operation extract and experimental analysis. Also the mainstream instruction sets, Amdahl law and many factors that affect performance of processor are absorbed here to develop the media enhancement unit. This paper focuses on the SIMD technology of addition, multiplication, SAD and so on.2. Design of the media enhancement unit. Based on the overall consideration of the existing processor, out of order execution and balanced pipeline division are introduced here. Verified multiplication IP is used to enhance the reliability; Decompose the multiplication from high-bit wide to the parallel low-bit wide is used to reduce the combinational logic delay; the internal reorder module is used to ensure the accuracy of interrupt and exception; clock gating and operand isolation are used to control the power.3. Research of de-interlacing. A novel classification-based motion adaptive de-interlacing algorithm is proposed in this paper. It mainly consists of motion classification, wiener-median and 3-tap median filtering. Experimental results show (?)both of the objective performance and subjective evaluation are satisfied. Also it is a case of media processing, the complex operation are analyzed and mapped to the media instruction set, and the result of media processor and algorithm simulation are comparative analysis.