Study On Reliability Of Industrial Wireless Networks And Testbed Design

Industrial Wireless Network (IWN) is one of the new and hot researchtopics in the field of industrial control and systems with the rapiddevelopment on wireless sensor networks. IWN can extend industrialcontrol network to the "blind spots" in the plants for some realistic oreconomic reasons, such as rolling industry. It makes the high temperatureand high humidity environment, and fast moving machines no longer thebarriers of information obtainment. However, the reliability is the keyrequirement to realize the envisioned IWN in industrial controlapplications. The reliability of wireless links is incomparable to wiredtransmission medium due to the following two main aspects. Firstly, in thecomplex and time varying noisy environment, other wireless radioequipments with WiFi and Bluetooth protocols may cause co channelinterference. Secondly, wireless links are of the characteristics of seriouspath loss and multipath fading over time and space due to mist block andmetal reflection. Thus, link reliability is one of the focuses of IWN for realapplications.In this paper, we study on one of the typical industrial wirelessnetworking standards, i.e. Wireless HART standard by analyzing the mainproblems of its reliability techniques and proposing new reliabilityimprovement methods including anti interference and anti fadingperformance. Wireless HART is based on direct sequence spreadspectrum/channel hopping(DSSS/CH) and transmission powerenhancement mechanisms to improve the reliability of wireless links. Butthe main idea of the former mechanism is to provide reliable channel setfor hopping. If successive jump to the interferenced channels, transmission link will be interrupted. The latter mechanism is only useful for path lossdue to mist absorb and block. However, it is not very great to resistmultipath fading caused by metal reflection. It will cause seriousinterference within the network and power hungry problem. In order tosolve these two problems, we get the following contributions in this thesis.We propose a cognitive radio based anti interference optimizationmethod for industrial wireless DSSS/CH system by providing the mostreliable hopping channels. An optimization model for channels locationsetting problem is established to maximize the number and capacity sum ofhopping channels. We propose a fast hierarchical traversal algorithm tosolve the optimization problem. The advantages of the proposed methodare as follows: (1) The spreading gain is maximized, which means thecapacity sum of hopping channels is maximized; (2) The channel hoppinggain is maximized, which means the number of hopping channels ismaximized. Thus the link reliability gain can be maximized.We propose a cooperative anti fading mechanism among severalwireless radio equipments to overcome the multipath fading by gettingtime and space diversity gains. The main idea of our scheme is that eachreceiver receives the signals from several wireless transmitters andcombines them by maximum ratio combination before demodulation.Firstly, we get the theoretical relationship between the link reliability andthe number of cooperative equipments m and path loss coefficient.Simulation results show that the link reliability improvement is maximizedat m=2 and becomes saturated when m increases. Secondly, we applynon orthogonal cooperative transmission to avoid the reduction of linkthroughput. We analyze the relationship between the link reliability and m,maximum symbol delay and path loss coefficient.1. The existing testbeds have several limitations such as the limitedphysical layer reconfiguration, large reconfiguration delay and difficultyon synchronization. These limitations make it very difficult to implementcognitive radio and cooperative transmission. In this paper, we propose a software defined radio based method for wireless testbed design andimplementation. The designed wireless node can realize the physical layerreconfiguration with programmable radiofrequency chip, programmableintermediate frequency chip and DSP for baseband signal processing. Aprecise synchronous clock based on 1PPS GPS clock source and clocksynchronization chip is designed to realize synchronized reconfiguration ofphysical layer. For fast reconfiguration, we configure the chip register bythe AVR micro controller. In theory, the reconfiguration delay is within100 s. It meets the requirement of the real time demand of industrialwireless channel hopping.