| Power Factor Correction has become a research hotspot in the field of power electronics technology to reduce the harmonic pollution from power electronic devices and to increase the input power factor. Compared to traditional analog control strategy, digital control has its advantages, such as more flexible, stable and reliable performance, short development cycle, upgrade convenience, lower cost, etc. So, the research of digital control technology for the power factor correction has become an important research direction.DSP and FPGA are two main implementations of digital control, while compared to the control DSP, FPGA could achieve parallel algorithm to improve the speed of operation and optimize transient response, also it can lay a foundation for realization of the IC controller. This paper mainly researchs the digital control of Boost-PFC based on the traditional double-loop control method and its FPGA implementation. A simple feed -forward compensation circuit is increased to the traditional structure to improve the power factor. Matlab/Simulink simulation and experimental results verify the effectiveness of the design. First, this article introduces the development and research of the power factor correction technology ,and clarify the importance of research in the digital control of active power factor correction (APFC).Then, describes the double loop control circuit theory for Boost-PFC,model for the Boost circuit using the average state space method, and get the power stage small signal model. And then, analysises and designs the current loop and voltage loop controller,and demonstrats the introduction of feed-forward compensation circuit could improve the power factor from the angle of input admittance. Finally, the paper gives the operation process of the current loop and voltage loop controller and the FPGA implementation for DPWM. Matlab/Simulink simulation and experimental results verify the effectiveness of the design, the output voltage can be stabilized at 400V, input current total harmonic distortion (THD) is 6.14%, and input power factor is up to 99.85%.The analysis and design process in this paper can be a reference for ASIC chip design ,and lay a fundation for further study on the integrated APFC control chip. |
