Hardware Design For Multi-Mode Satellite Position Receiver

As the platform of the Beidou satellite positioning receiving terminal,the hardware structure is a very important part of the receiving terminal.In this thesis,we designed the overall hardware structure and the important modules of the receiver on the bases of the technology needs.This thesis mainly discussed the hardware design ideas and technical design points.Firstly,we analized the technical requirements of receiver on the bases of satellite navigation system's basic principles.Secondly,this thesis discussed the receiver framework and important module function division,which was influenced by embedded system development and system on chip concept.We designed ARM+FPGA core hardware platform.Thirdly, we designed analog receiver circuit,NIOS II platform,communication interface between the FPGAs in detail.Then,we designed the minimum system of S3C2440,the external memory,RTC,USB interfaces of ARM.This thesis discussed the design of LCD display circuit and keyboard inputting circuit.Finally,we computed the overall power consumption and designed the power supply module.This thesis focuses on the ideas of receiver hardware design.We designed the overall framework of receiver obtained by the technology needs.Based on the design of system hardware platform,we tested A/D converter circuit of the baseband processing part and navigation calculation module in the embedded processor.After the completion of system functional testing,this thesis discussed the improvement plan for the system design.