Digital Pre-distortion Theory And Algorithm

Power Amplifier (PA) is used to amplify signals to the desired power and transmit out the signals through antennas, it is a key component and indispensable to modern wireless communication systems. However, PA has nonlinear characteristics inherently, and also has memory effect especially in the broadband communications. These seriously affect the normal transmission of the communication system. It is well known that there is an approximate inverse relationship between the PA efficiency and its linearity. The price paid for higher efficiency is that nonlinearity will cause outband spectral regrowth (broadening), which leads to adjacent channel interference(ACI), it will also cause inband distortion, which degrades the bit error rate (BER) performance. With the rapid development of wireless communications technology, high linearity has been demanded in PA increasingly.Digital predistortion is an important technology for linearizing power amplifiers. Owing to its digital, adaptive, integrated and other advantages, digital predistortion technology has gradually attracted people's attention in the aspect of power amplifier linearization techniques. In this dissertation, we mainly research three major digital predistortion methods.First of all, this dissertation introduces the basic theory of nonlinear power amplifier, describes the major technical indicators measuring the degree of the power amplifier linearity in detail, and summarizes the behavior level models for simulating nonlinear power amplifier. These lay an important theoretical basis for the digital predistortion technology research.Then, based on the description of the basic principles of digital predistortion technology, an memoryless digital predistortion method using the RASCAL adaptive algorithm is researched mainly. The simulation and performance analysis are given. The results show that the predistortion method is effective. In order to solve the problem about the loop delay in real time implementation of digital predistortion circuit, the amplitude difference correlation function algorithm is given, this method can estimate the integer loop delay accurately. Loop delay compensation can improve the performance of digital predistorter in practical project.After that, two main digital predistortion methods for memory power amplifiers are studied in-depth. The first one is the memory polynomial model based digital predistorter using indirect learning architecture, the second is the NARMA model based digital predistorter using multi-lookup table structure. For each digital predistortion method, its basic principle, parameter extraction algorithm and look-up table calculation are given, and then the test validation shows the effect of the corresponding digital predistorer through the MATLAB simulation. The validation process uses different input signals and different power amplifier models to cross-checking, the graphics and performance indicators show that the digital predistorters are effective for linearizing power amplifiers.Finally, the implementation program of digital predistorter is presented. Focusing on the baseband digital predistorter using lookup table structure, hardware implementation work is carried out. The baseband digital predistorter test system hardware platform and the overall system architecture for digital predistorter are described in FPGA. The detailed FPGA implementation flow of lookup table for digital predistorter is given. The implementation results show that the digital predistorter can achieve the desired results, could complete the correction to nonlinear power amplifier ideally.