.2.5 Gb / S Burst-mode Optical Receiver Design

Nowadays passive optical network(PON) is the most popular high-speed access network technology, it adopts point-to-multipoint topology structure. The upstream transmission of PON uses Time-Division-Multiple-Access(TDMA) protocol, multiple subscribers share the same optical line termination(OLT). The OLT receives burst-signals whose power and phase vary significantly. In fiber-optic backbone network, optical burst switching(OBS) as the former of optical packet switching(OPS) has highly practical value and development prospects. Both PON and OBS systems should quickly process burst-signal. Burst mode receiver(BMR) as the key technology of PON and OBS was being researching hotly.Focuse on researching BMR for burst-signal at rate of 2.5Gb/s. The advantages and shortcomings of existing schemes of BMR are summed up and the popular feed-forward DC-coupled topology is selected. All circuits of BMR are designed and simulated that they are: circuit model of PIN photodiode, pre-trans-impedance amplifier(TIA), automatic gain control circuit (AGC), automatic threshold control circuit (ATC), time-delay circuit, limiting amplifier and reset signal circuit. Then get the whole circuit of BMR.Creative points of this paper: Add AGC into TIA to extend dynamic range. AGC is designed by using of a hysteresis comparator so avoiding using RC circuit which is always in regular AGC. AGC responds instantaneously because setting and resetting it just take one bit time at rate of 2.5Gb/s so that this technology improves the channel utilization. TIA has 7dB adjustment for different burst-signal according to their amplitude with the help of AGC. Automatic threshold voltage is obtained by adaptive detector circuit including peak detector and bottom detector which detect the peak and bottom level of burst-signal, then by the use of a resistive divider getting the middle level of the burst-signal so that ATC cancels the DC offset voltage effectively and improves signal quality of limiting amplifier. Reset signal circuit detecting burst-signal envelope and get reset signal by the use of logic circuit. Internal reset signal circuit make a free of external reset circuit, enhancing receiver's flexibility and scalability. Time-delay circuit makes the best respond of BMR that after each burst-signal ending the reset signal just begins to reset AGC and ATC to steady state, reducing guard time. In addition, use envelope signal getting from reset circuit separate two burst packets through a AND gate to reduce noise during guard time.Simulate the whole BMR at rate of 2.5Gb/s, the performance of designed BMR is greatly improved. Sensitivity is -24.7dBm , Dynamic range is 25.1dB, preamble time is 15ns, guard time is 30ns.