A Power Continuously Variable Efficient High-fidelity Linear Audio Amplifier Research And Design

With continuously shrinking of portable electronic equipment, the main trends of the audio power amplifier design are high density, high efficiency and high fidelity. Conventional Class AB linear audio amplifier processes high fidelity but the efficiency is poor. Switching Class D audio amplifier has high efficiency at the cost of reduced linearity and large external inductor. What's worse, the switching noise may interfere with RF functions such as mobile phone, GPS or FM radio reception. So designing high efficiency and high fidelity linear audio power amplifier is largely required.A continuously adaptive power supply linear audio amplifier ClassⅠis designed in this thesis. First a single power supply ClassⅠlinear audio amplifier system architecture is proposed according to the characteristics of the audio signal, and then the efficiency of this audio amplifier is derived. The main blocks of ClassⅠare signal processing circuit, continuously adaptive output power convertor and bridge-tied Class AB output stage. To optimize the power dissipation of both PMOS and NMOS power transistors with positive adaptive power supply, variable gain signal processing circuit is designed. The power convertor employs buck structure and can operate in PWM and PFM mode according to the load current level. When the current load is heavy, the buck convertor operates in PWM mode and the output changes along with the audio signal. The average current feedback is introduced in voltage feedback loop to widen the loop bandwidth. An improvement of DC-DC Buck PWM controller is made to solve the pre-phase problem. Bridge-tied Class AB output stage is composed of two three-stage amplifiers. The power supplies of the power stage and the gain stage are separated to stabilize the amplifier while the power supply of the power stage changes.A prototype circuit was implemented on 0.18μm@3.3V CMOS technology. The measured THD+N is better than 0.45% when output power is lower than 270 mW with a load of 8Ωand the maximum efficiency is 70%. When output power is lower than 100 mW, the efficiency is doubled comparing to class AB. The design is verified by silicon.