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Two-dimensional Simd Architecture Low-power Scheduling

Posted on:2009-02-18Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZhangFull Text:PDF
GTID:2208360272459083Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
Two-dimensional SIMD architecture is widely used in the field of embedded system to boost the performance of multimedia processing. This architecture is consisted of a two-dimensional array of PEs (processing element). The PEs in the same row or column work as a SIMD unit, and different SIMD units can work parallelly. Due to the parallelism of data and computation, two-dimensional SIMD architecture is often employed in a SOC with a general processor which is used to deal with the sequential part of the program. Currently, two-dimensional SIMD architecture has already been well concerned in both academe and industry.Because of the special architecture of two-dimensional SIMD and the specialty of multimedia applications, currently research on two-dimensional SIMD focuses on performance enhancement. At the same time, ignore the power consumption. Two-dimensional SIMD is mostly used in mobile equipments. Limited by battery's volume and weight, power consumption becomes more and more important. Low power techniques on hardware level have developed maturely. More effect can get from software level low power techniques. A lot of research on compiler instructed low power techniques, such as dynamic voltage scaling (DVS) and turning off unused system units (TOSU).After deeply analyzing the architecture of two-dimensional SIMD and source code of multimedia applications, this thesis presents a low power algorithm on compiler level. As a multimedia speedup component of SOC, two-dimensional SIMD architecture is almost idle while the system doing serial operation. Even when the system is executing two-dimensional SIMD parallel operation, because of the small data type and high parallelism of multimedia programs, it's not all the two-dimensional SIMD components work all the time. This leaves a large space for turning off idle units properly and saving clock dynamic power consumption and static power consumption. This thesis focuses on the power consumption of these two fields, analyzes the source code while compiling it, and finds correct position to insert some special commands. These commands tell system to turn on or turn off which two-dimensional SIMD component. Hardware recognizes these commands and acts as told. We implement an architecture simulator base on SimpleScalar. We test our algorithm on this platform. The result displays that this algorithm can obviously save power consumption, while reduce performance very little. The main contribution of this thesis is:1. Present a low power schedule algorithm aim at two-dimensional SIMD architecture.2. Apply different schedule methods to different two-dimensional SIMD function units separately.3. Localize the memory employ according to small data span of multimedia programs.4. According to the experimental results, we give out some proposals for running multimedia programs on two-dimensional SIMD architecture.
Keywords/Search Tags:Two-dimensional SIMD architecture, Low power, Compilation optimization
PDF Full Text Request
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