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Ofdm-mimo System Receiver Key Technologies And Fpga Implementation

Posted on:2009-09-22Degree:MasterType:Thesis
Country:ChinaCandidate:M H LiuFull Text:PDF
GTID:2208360245961369Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
In recent years, there has been great development in the wireless communication around the world. More and more new concepts have appeard. All kinds of new system and key technique have been changing quickly. Since Orthogonal Frequency Division Multiplexing (OFDM) has the characteristics of high spectrum efficiency and robustness agninst frequency selective fading, and Multiple-Input Multiple-Output (MIMO) systems could improve the capacity of the communication system and spectral utilization ratio at double in case of not increasing bandwidth, MIMO-OFDM has been regarded as the key technology of B3G communication system.This paper is responsible for FPGA design and implementation of OFDM-MIMO system receiver, including Digital Down-Converter (DDC), OFDM synchronization and demodulation.This paper introduces the basic theories and characteristic of OFDM firstly, and then has a related introduction about the synchronization technique and DDC. Synchronization technique is one of the key technologies in the OFDM system, which purpose is compensating and restoring the system performance from the offset of timing, carrier frequency and sampling clock. Digital Down-Converter (DDC) is one of the key technologies in Software Defined Radio, which basic function is to pick up useful narrowband signals from high-speed medium frequency digital signals and transform them to base band. Afterwards, the low-speed base-band signals can be processed by DSP devices.In the topic of the design and implementation of DDC, we firstly introduce its basic principle, then design the DDC according the requirement of our system and make some reasonable change on implementation for saving the hardware resource.In the topic of design and implementation of time synchronization, an algorithm which use the good correlation of PN sequence to detect the synchronization frame is adopted. For acquiring better synchronization performance, the received data are divided into four channel to make correlative operation with local PN sequence separately.In the topic of design and implementation of frequency synchronization, an estimation scheme combining PN sequence and second-order feedback loop is proposed to strike a balance between estimation range and estimation precision. This scheme has wide estimation range and high estimation precision.
Keywords/Search Tags:FPGA, OFDM, DDC, time synchronization, frequency synchronization
PDF Full Text Request
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