High-speed Fpga-based Dlms Adaptive Digital Filter Design

Along with the development of digital signal processing technology, high speed and real-time digital processing equipment is required by more and more fields, such as radar, image processing, and communication system, etc. It is researcher's work to find proper high speed digital signal processing algorithms. Least Mean Square (LMS) algorithm, as one of classical adaptive filtering algorithms, is widely used in digital signal processing designs. However, LMS algorithm is not suitable for high speed processing domains, because of its iteration structure. Thus, this dissertation focuses on algorithms derived from LMS algorithm and their implementations based on FPGAs. First of all, with the help of large quantity of related documents, this dissertation provides an overview on high speed adaptive digital filter design's background and prospective. FIR digital filter's structure was analyzed here. This dissertation also introduced some useful architecture for high speed design, such as, pipelining, parallelism, etc.Then, this dissertation gives a brief introduction on LMS algorithm. Its convergence condition is discussed here. Based on relaxed look-ahead technology, this dissertation deduces Delayed LMS algorithm. Performance comparison was made between LMS and DLMS. Results prove that DLMS algorithm could work under high sampling rate with tolerable convergence rate slow-down.Furthermore, an 8tap/8bit parallel DLMS adaptive digital filter is introduced. This dissertation gives a detailed analysis on its design and implementation methods. In the system level, parallelism is utilized, and in each branch, fined-grained pipelining technology is used to shorten critical path. Experiment results prove that system could work smoothly on 200MHz sampling rate condition.At last, this dissertation provides two different improved strategies on the basis of parallel DLMS adaptive digital filter design. The first one is reconfigurable DLMS adaptive filter design based on parameter control. The concept of off-line control is introduced here. The other strategy is based on the concept of intelligent control. Filter would choose proper length and iteration step according to signal environment automatically. In such case, stationary stage error could be low, and at the same time, the convergence process could be accelerated.