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Simulation Of The Broadband Multiplexer Chip And Cache Management Algorithm

Posted on:2006-10-17Degree:MasterType:Thesis
Country:ChinaCandidate:B HuFull Text:PDF
GTID:2208360152497532Subject:Communication and Information System
Abstract/Summary:
In the following I did some research in simulation of one kind of broadband Multi-access chip. Broadband Multi-access chip, which supports IP or ATM protocol, is an integrated circuit of high performance and low cost. It is applied in device of broadband integrated service access, such as DSLAM, wireless station of 3G, and all kinds of optical access system. For its multicast function, it is suitable for many devices, supporting services of conference call, long-distance education and video-on-demand. However, factory in China can not produce such chip, and experience and technology of producing this chip can not be easily found. So it is necessary to do simulation of this chip to obtain its basic performance and to solve some problems before its production. This project is done in the Opnet environment. It can be divided into four parts: studying and constructing model, studying algorithm and implementing model into Opnet, running simulation model and analysis results. After that, we can get the performance parameters of this chip, such as time delay, time delay jitter, loss rate, velocity and so on. In addition, the memory of this chip is great concern in the project, and suggestions and solutions about memory problems come out. The buffer is used in the chips, so we use buffer management. We do further research in exiting buffer management and a new buffer management scheme called DT+SMA is presented. This scheme combines SMA (sharing with minimum allocation) and DT (dynamic threshold) arithmetic,and we find it has the benefits of both DT and SMA. Through analysis the scheme in theory and simulation we can see that actually DT+SMA is better than SMA in fairness in single priority, and is easier to apply in multiple priorities model than DT when achieving the similar performance with DT.
Keywords/Search Tags:Multiplexing chips, buffer management, packet multiplexing
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