Design And Implementation Of The Ipsec Protocol Security Chip

The cyberspace security is becoming more and more important, as data or information transmitted over the public networks are susceptible for trapping and sniffing. Many technologies are developed to secure our networks. Of these, Internet Protocol Security (IPSec) is widely used to prevent the networks from attacks and intrusions.Software-based implementation of the IPSec Protocol can be very sophisticated, because it will take a great lot of time to perform complicated cryptological algorithms. These result in the performance issue.In this dissertation, a chip-based method of designing and implementing IPSec protocol is proposed which is applied to network interface card. Firstly, the security architecture of IPSec is analyzed, emphasized on Encapsulation Security Payload, Authentication Header and processing for incoming or outgoing packet. Furthermore, a scheme of implementing IPSec security chip which is FPGA based is presented including its whole architecture. And then a scheme to testing and validating all designs is proposed.To fulfill functions which include data and identity integrity, the hardware implementations of MD5, SHA-1, HMAC-MD5 and HMAC-SHA-1 algorithms using FPGA are presented in detail. And then synthesis, timing simulation and validation with testing scheme mentioned above are made. Moreover, experiment result and samples are given to support designs' validity and rationality, and achievedgoals expected.