Mimo Communication System, High-speed Dsp Technology

Multiple Input & Multiple Output (MIMO) System is likely to become one of the key techniques of the next generation of wideband mobile communications. With multiple antenna elements equipped both in transmitter and receiver, MIMO can increase the system capacity and the spectrum efficiency a lot without increasing the bandwidth. This thesis researches the structure of the MIMO wireless communication system and discusses how to apply DSP technique to the system.The first chapter introduces the MIMO communication system, its development and its current status. The second chapter discusses the principle of the Space-Time Code (STC) and simulates the BER of the Space-Time Block Code and the Space-Time Trellis Code in the pseudo-static Rayleigh fading channel. With STC in the MIMO communication system, the transmit rate of the wireless channel increases efficiently. The STC brings in spatial and time correlation to the signals transmitted by different antennas and provides space diversity advantage and coding advantage with the system. The third chapter researches the systems combining MIMO with OFDM (Orthogonal Frequency Division Multiplexing). MIMO-OFDM utilizes STC or SFC (Space-Frequency Code) to introduce the frequency diversity, so better performance will be achieved in the frequency selective fading channels.The fourth chapter studies the software and hardware platforms and implementation of the algorithms using the digital signal processors. The system consists of radio frequency part, transmitter, receiver and signal processor. The core of the signal processor is the Hammerhead-PCI board containing 4 ADSP21160 DSPs; the board is connected to the PCI bus of PC and mainly fulfills coding and decoding algorithms. ADSP21160 supports the structure of multiple processors, and it possesses SIMD (Single-Instruction Multiple-Data), these features enable high speed parallel processing. The fifth chapter presents the hardware interfaces including Link Port and LVDS. Because the interface board is connected to the PCI bus, the design of the PCI and the programming of the Windows drive program are discussed.