Network Processors, Packet Transmission Structure

As a core technology on promoting the future network, network processor (NP) is being given more and more attention in IC field, and there are many companies and institutions researching on NP. Based on network protocol processing, NP is a new type of RISC processor with special architectural features that are optimized to perform packet-processing functions. This type of processor has emerged to cope with the ever-changing networking applications that are becoming increasingly complex, and will be the core component of new types of backbone devices such as routers and switches.Packet Transfer Unit (PTE) is one of the most important units of NP, which is responsible for packet analyzing and processing. There are two lanes in PTE, one is ingress lane, in which packets are transmitted from MAC to Switch Fabric, and the other is egress lane, in which packets are transmitted from Switch Fabric to MAC. In the process flow of PTE two important points are included:1. Ensuring forwarding sequence of packets;2. Finishing routing lookup with high rate.The primary work of research and design in this paper includes:1. Giving an entire research of NP's architecture, discussing some key features of NP including Programming, Parallel Processing, Coprocessors, Multithread and Intelligent Processing.2. Designing PTE, with the architecture of AMCC nP3400 as a source reference. Adding a scheme to this design, which is in order to ensrue forwarding sequence of packets. Doing function simulation for the design of PTE, with emphasis on this scheme.3. Introducing a fast IP routing lookup scheme, designing the modle of this lookup scheme, and analyzing performance for this design.This thesis is for the purpose of accumulating experience on research of NP. In the case of having little achievement at hand, the author has undertaken research from function demand.