Font Size: a A A

CPM Low Complexity Sequence Detection Algorithm And Its FPGA Implementation

Posted on:2016-05-17Degree:MasterType:Thesis
Country:ChinaCandidate:R ZhangFull Text:PDF
GTID:2208330482957600Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Continuous phase modulation is widely used in the deep-space, mobile, military communication and other communication area, due to its constant envelope and high efficiency of spectrum. Multiple modulation index, multilevel system, long impulse response length can achieve faster data-rate and higher spectrum efficient. But the high performance is gained at the expense of high complexity of the receiver, which greatly impedes the development of CPM. Therefore looking for the low complexity demodulation method is significantly important.This paper mainly researched on the low complexity demodulation method of CPM and its FPGA implementation, including these parts:basic theory, key technology, hardware implementation etc.Firstly, this paper introduced the background and significance of the research on CPM and summarized its developing history and current situation at home and abroad.Then, this paper illustrated the performance boundary of sequential detection, analysed the impact of different parameters on the performance and researched the classical reducing complexity technology. Then a low complexity coherent demodulation algorithm based on the tilted phase, eigenvalue decomposition (EVD) and state-space partitioning (SSP) was proposed. Meanwhile, a low complexity noncoherent sequence detection algorithm based on SSP came up. The analysis and simulation results showed that the algorithm could reduce the number of match filters and trellis states sharply with low cost. To solve the signal synchronization problem, this paper derived the CRLB of parameter estimating tried. Studying on the decision-direct synchronization methods based on low complexity detection and the algorithm which isolated with demodulation based on Maxim-Likely function.Finally, based on the theoretical analysis and computer simulation, the design of low complexity algorithm had been realized on FPGA and tested on the hardware platform. The simulation and test result show that the test performance and theoretical analysis are nearly identical.
Keywords/Search Tags:Multi-h CPM, low complexity sequential detection, EVD, synchronization, FPGA
PDF Full Text Request
Related items