Research On Key Technology Of Multi - Core Processor Mapping

With high performance and low power dissipation, multi-core processor has gained prominence instead of single core processor. The emergence of multi-core processor provides an opportunity for parallel implementation of varieties of applications. But at the same time, it also poses new challenges to how to improve application performance by exerting the parallel characteristics of multi-core processor.In this paper, we present an extended data flow graph (EDFG) which can display both date depends and branch control depends. To remove antidependences and output dependences, we introduce variable expansion method to extend every variable with a new dimension:history. Based on the EDFG, we propose a fast fusion algorithm to parallelize serial codes to certain grain size tasks. In order to minimize data memory usage after variable expansion, we adopt variable address multiplexing technique based on variable life span.All of these proposed algorithms were realized in one mapping framework, which can combine task partition, scheduling, mapping and routing together, and bring detailed task information to support various kinds of scheduling, mapping and routing algorithms.In our early evaluation, this framework can map serial codes on certain multi-core processor automatically and get effective speedup.