The Research Of Low Power Design Technology For Embedded System

With the developing requirements in size and performance of embedded devices from the market, the gap between small size, high performance and the limited battery life has become more and more wide, low power design of embedded system is an efficient approach to solve this problem.Low power design of embedded system consists of two parts: one is low power design of hardware and the other is low power design of software.Low power design of hardware includes processor,memory,clock and A/D module. The low power design of software includes device scheduling policy and dynamic power management policy.In order to solve the problem of low power design of complicated embedded system, a novel dynamic power management policy is presented. Firstly, based on BP neural network and adaptive learning tree, a model is built to predictive next idle-time and task; then it controls the system to realize the lowest power based on the results. Experiment shows that this policy has wider application area and can obviously reduce the average power consumption of systems compared with other predictive policies.It relizes the low power design of vehicle embedded system. Low power design of hardware includes power design and dynamic voltage scaling. Based on the character of vehicle embedded system: there is solid relationship between two tasks and no solid relationship between two functions; it adopts different policies for different levels: device scheduling policy for task level and dynamic power management policy for function level.