| The development of science and technology can not depart from the improvement of test and measurement techniques. As a universal test instrument, the Digital Storage Oscilloscope plays an irreplaceable role in the field of test and measurement. The analog channel is one of the most important parts in the Digital Storage Oscilloscope, the bandwidth of which is the key indicator for evaluating the performance of the oscilloscopes. In the field of Digital Storage Oscilloscope at home, there is still a large distance from the foreign mature technologies. Therefore designing analog channel with high bandwidth independently is particularly important.In this paper the development status of Digital Storage Oscilloscope at home and board are introduced firstly. According to the criteria for analog channel design, the difficulties for designing 900MHz analog channels are also analysed. The 900MHz analoy channel is designed and tested and the targets are fulfilled. The main contents of this paper are as follows.1. The project of designing analog channel. Three differferent schemes for the 900MHz analog channel design are proposed and an optimum one is selected. The methods for controlling the modules such as analog channel and the trigger channel are decided. Then problems of the signal integrity are discussed.2. The detailed design of analog signal conditioning channels. To overcome the shortage in designing analog channels, a structure of cascading digital stepping attenuator and fixed-plus amplifier is used. According to the requirement of designing analog channels, the proper device is selected. Considering that temperature changing can induce the digital stepping attenuator larger gain error problem, a kind of temperature compensation circuit is put forward to realize the correction.3. The detailed design of trigger channel and channel control module. Since the multiplexer cannot satisfy the requirements in higher frequencies, a high-speed switch is used to redesign the multiplexer circuit and to realize the selection of trigger signal. A frequency dividing circuit is also designed to slow the high frequency tigger pulse in order to satisfy the input requirement of FPGA. Besides, a kind of video trigger circuit supporting high-definition video format is designed in this paper.4 The signal integrity problem. The influence factors of the signal integrity are considered, and then an anti-interference method is put forword. |
