Modulation Domain Analyzer Key Technologies - Instantaneous Frequency Measurement Of Components Research

Modulation Domain is a plane domain which is consisted of the frequency and time of signals. It shows the relation between frequency and time involved. It is a necessary field to measure signals in three-dimension space of signal (time domain, frequency domain and modulation domain). Modulation domain analysis offers a unique method for viewing complex modulated signals. Modulation Domain Pulse Analyzer (MDPA) is used in a wide range of applications including digital communication systems, radar systems, and electronic warfare system, mechanical electronic system and is necessary for researching, producing, maintaining modern military and civilian electronic instruments.The principle of this measure system, the measure theory and the key techniques are introduced in this paper. The key techniques including"Zero Dead Time Counter (ZDT)","Related Counter","Positive and Negative Base Time Counter", etc. The methods to realize the system in hardware and software are presented, too. At last, the theory errors of the system are analyzed and parts of the measure results are displayed.The design and realization of Instantaneous Frequency Measurement system composed of high-density FPGA, high-performance CPLD and DB25 parallel interface are presented in this paper. As the control center and transmission bridge, FPGA plays an essential role in this system. FPGA not only accomplishes most of the digital circuits but also considerably improves the adaptability and flexibility of the system.In the sequential digital logic design, utilizing abundant sequential resources in the FPGA such as PLL, D Flip-Flop, and Counter, realizes exactly control to the input and output clocks of the system, and can easily offset any sequential delay in the system. In the memory design, the embedded RAM in the FPGA is fully utilized, which can be easily resized to meet the needs of the system, and can be easily merged or divided or change the transfer rate.In the control of working process, User Interface on PC is designed from Visual C++ 6.0 SP6. The communication between PC and FPGA is realized through DB25 Parallel Interface, hence, the system control and measure parameter section can be easily done from PC.The detailed analysis of the logic design for core function modules in FPGA is presented, and the simulation results are displayed. The system's hardware design, parallel interface design and software design are introduced in other chapters. The PCB diagram, the logic schematic diagram of FPGA and some relevant program lists are also available at the end of the paper.