A Dual-loop Control Of Continuous Current Mode Power Factor Correction Controller Design

Now, the problem of line harmonic pollution has been attend more and more with the great demand of power supply quality in the information age. Active Power Factor Correction (APFC) is an effective technique for reducing harmonic distortion and increasing the power supply network efficiency.A double loop control, average current mode boost active power factor correction circuit using UMC 0.6μm 30V BiCMOS Process is presented in this thesis. The content of the thesis is based on an item which is cooperated with an abroad company. The circuit is applied in front of AC/DC power supply, can get a stable output direct current voltage of 400V with external boost circuit. The circuit maximizes the power factor by forcing the input line current to be sinusoidal, in phase with the input line voltage, and as free from line harmonics as possible. The APFC controller uses double closed loop which are current loop and voltage loop to realize the function of rectifier and leveling off voltage. The input supply voltage is from 90V to 264V alternating current whose frequency is 50 hertz. The output voltage is 400V with 12V ripple and its output power is 500W. This circuit can operate in the temperature rage of 0℃to 70℃and its switching frequency is 100kHz. It also includes over voltage protection, under voltage lock out with 2.8V of hysteresis effect and tri-fault protection, protecting the load and the circuit during false condition. It is suitable for Electronic ballast, SMPS and other applications.Firstly, the basic principle, basic convert mode and the control method of active power factor correction are analyzed and compared in this thesis. Secondly, the whole chip diagram was proposed according to the design specification and the whole chip's operational principle was introduced. Based on the whole chip function requirements, sub-block design and simulation were completed, including gain modulator, voltage error amplifier, band-gap voltage reference, under voltage lock out, over voltage protection and tri-fault detect. At last, the whole chip function simulation and some typical performance characteristics simulation were presented. In the conclusion of this thesis, the research value of this circuit was pointed out, but it was suggested that the tolerance simulation and post-layout simulation should be needed before it become production.This thesis is a production of circuit principles and simulation practice. Based on the circuit principle analysis, the author simulated the sub-block circuits and the whole chip circuit by HSPICE. The simulation results indicate that the circuit has achieved the design specification and the expected electrical characteristics, also have verified the circuit's function. Although there are unavoidable disadvantages of this project, it is a worthwhile and valuable experience.