Low Power Consumption, The Design And Realization Of High-temperature Linear Regulator

DC/DC converters are widely used for power efficient circuits in mobile communications applications, such as cellular phones, PDAs and laptop computers. LDO (Low Dropout Regulator) belongs to step-down DC/DC converter. LDO is less expensive, lower in noise and power, smaller in size, and easier to be used. Nevertheless, the efficiency of the linear voltage regulators is generally low(It is around 65%-75% in today' s market) and the lifetime of the re-chargeable battery is therefore greatly reduced, in order to increase the lifetime of the re-chargeable battery and regulate the input voltage when the voltage of battery drops gradually, low-power-consumption, low-dropout regulators have been developed. The output to input power ratio defines the overall efficiency of the LDO:η= ×100% , I₀ is the output current, V₀ is the output voltage,I_q is the Error Amplifier current, V_I is the input voltage. In order to improve the efficiency, low dropout voltage V_Dropout and low quiescent current Error Amplifiers are used in LDO design. The typical value for quiescent current I_q is 40-100μA, dropout voltage is 200-400mV. At the same time, the operational temperature range for LDO is —20 80℃, while in other applications, such as electronic automobile or environment detecting, LDOs are required to maintain the power supply stability in an extended temperature range (—40-120℃) . Although there is Thermal circuit inside the LDO chip, which could shut down the chip before the temperature reaches the upper limit. At high temperature (before the temperature upper limit), the LDO chip-inside, especially the Error Amplifier would not be shut down by mistake. For the reason above, the soft start circuit for LDO chip must make sure the chip could operate at high temperatures. Third, the stability is also the primary aspect. Conventional LDO usesESR (equivalent series resistance) frequency compensation. This introduces an ESR zero in the open-loop transfer function and contributes a pole-zero cancellation to ensure closed-loop stability. This design, however, is not an optimal method to maintain stability. In general, the dominant pole is at the output node. Since typical voltage regulator has wide loading current range, the dominant pole changes significantly with different loading conditions. Thus the frequency response is only optimized in a fixed load current. Other problems such as low open-loop DC gain, ESR variation and ESR ripple voltage also limit the performance of the regulator.In order to lower the quiescent current and improve the overall efficiency, this paper proposes a kind of bias circuit which would supply a 30nA reference current at least, which improves the overall efficiency to 85%;At the same time, by utilizing the design of leakage current compensation in soft start circuit, the proposed LDO could be operated in an extended temperature range of -40 to 120°C;Third, a new frequency compensation scheme is proposed for the LDO to optimize the regulator performance over a wide load current range. By introducing a tracking zero to cancel out the output pole, the frequency response of the feedback loop becomes load current independent, which improves the stability of LDO.The simulation and experimental results show that the chip design achieves the specifications.