| As the most crucial techniques that apply in electronic systems, a high performance frequency synthesizer is absolutely necessary that ensure modern electronic systems such as radar and communication systems to achieve high performance. By the development of modern electronic communication technology, higher requirements have been presented on various targets of frequency synthesizer such as phase noise, frequency-hopping and Stepped-Frequency. L band small step and low phase synthesizer has been designed by adopting three PLL controlled by MCU.Firstly, the basic theory and characteristics of various frequency synthetic technologies and the mixed frequency synthetic technology of DDS+PLL have been introduced, and the distributing rules of the spurious noise of the DDS and the method of reducing it are analyzed and summarized according to the application of DDS chip AD9956 in the fast frequency-hopping synthesizer.Secondly, the scheme has been demonstrated roundly based on the basic theory and analysis. The feasibility about the phase noise, SFDR, hopping step, has been analyzed. the key technical problem in mixing PLL, such as the research on capture band, high-speed lock protection circuit,intermediate frequency filter and Loop filter, is carried out. A simple and reliable scheme for high-speed lock protection circuit in mixing PLL is presented. According to the requirement of system, the PLL chip ADF4113, Mixer RMS-25MHW, the VCO HE484, Frequency Divider HMC426MS8 and so on, have been chosen to establish the system circuit. MCU C8051F330 has been used for the implement of the input of the function and frequency control words.Finally,through the EMC design of the layout and grounding, the requests have been achieved by debugging all the whole circuits and programs time after time. Its specifications show as following: output frequency range 950～1450MHz, phase noise is superior to -90dBc/Hz@1kHz, spurious is superior to -65dBc. So the feasibility has been verified. |
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