Design And Implementation Of Image Preprocessing Unit Based On FPGA

With the fast development of electronic technology,real-time image processing is widely used in the field such as multimedia and image communication.FPAG now has become an ideal choice of hardware in real-time image processing,while the research and the implementation of digital image algorithms based on FPGA is the new key-point in information industry.The image preprocessing unit(PPU) is part of specific chip for video image processing based on USB2.0.This thesis studies a solution to design and implement an image preprocessing unit that uses image preprocessing algorithms with low price.The image preprocessing unit of this thesis is centered on the following three part:A.convert an image from the YCbCr4:2:2 format to a YCbCr4:4:4 format;B.convert an image from the RGB565 format to a RGB888 format;C.correct the bad pixel of the Bayerdata and convert an image from the Bayer format to a RGB888 format.Considering the cost of production,part C plays the most important role in the PPU. Combined with six-stage pipeline and two simple dual port RAMs,it performs bad pixel correction via a 3x5 window and format conversion via a 3x3 window.In the design of the PPU,improved multiplier is given,this new architecture can save more resource of FPGA.Simulation and verification are another important steps in the hardware design. With the help of Matlab,it completes simulation and verification of the image preprocessing unit in the environment of the development tool ISE Foundationl0.1 and ModelSim XEⅢ6.3c.The discovery demonstrates that the image preprocessing unit can successfully process 640x480(Video Graphics Array,VAG)pixels with desirable real-time results.It works fast as for the pipeline tech,which lays foundation for the processing of image data with higher resolution.