Optimization Of H.264 Encoder Based On TMS320DM642

The H.264/AVC is the latest international digital video coding standard. Compared to earlier standards, The H.264 standard has a higher coding efficiency, a wider range of bit rate, better image quality, more network-friendly and anti-error capacity. However, along with its performance improved, it has brought a tremendous amount of computing, so it is difficult to use its source code directly to achieve the real-time encoding and decoding. With its strong parallel processing ability and signal processing capacity, TMS320DM642[29] of TI corporation is an ideal platform to run the H.264 CODEC. The main task of this thesis is to optimize the H.264 encoder based on the DM642 hardware platform.In this paper, firstly, we briefly clarify the background of the research, and introduce the relational knowledge of the H.264 standard and the DSP embedded platform. Then we analyze each module of the H.264 encoder by time-consuming. After that, this paper carries out structural optimization, algorithm optimization, compilation optimization and memory allocation optimization on the H.264 encoder. In the algorithm optimization, I mainly optimize intra-frame macroblock mode decision, intra-frame prediction mode selection, inter-frame motion estimation and deblocking filter system, compare the results of optimization with the original results and analysis the results. In the compilation optimization, we transfer some simple functions which is called frequently to linear assembly optimization, such as integer transform functions, intra-frame prediction mode functions and run-length encoding functions. Finally, based on the DM642 hardware platform, we carry out memory allocation optimization, and put the functions which run frequently into the on-chip to improve running speed.Through the above optimization, the optimized encoder can achieve about 25 frames per second by CIF coded images, basically reached real-time encoding.