Study On SOC Multi-channel Ultrasonic Signal Acquisition And Processing Integrated System

With the rapid development of micro-electronic technology and EDA technology and the increase of the number of logic gates on a single chip, the performance of FPGA (Field Programmable Gate Array, FPGA)has been improved greatly, FPGA's features and treatment capacity is growing. Embedded system design based FPGA makes modern electronic product design more flexible, which example is the System on Programmable Chip (SOPC) named Nios II soft-core processor system that is designed by Altera Corporation. Nios II microprocessor which is developed by Altera company,based on SOPC techonlogy is a changeable, general 32-bit RISC CPU. The developer can easily use the system by using SOPC Builder. Furthermore, the Nios II soft -core, Avalon system bus and its peripheral interface system can be confugured according to his own requierments.Nios II processor system attracts designers'attention by its characteristics, such as high performance, flexible design, abundant IP provided, etc. However, application and research of Nios II is less in our country. In this thesis, the Nios II processor system will be attempted to apply to the Doppler ultrasonic diagnostic system, aiming for realizing system's processing and dominating functions.In the paper a Nios II control system is designed in FPGA,which achieves controlling the medical Doppler ultrasonic diagnostic signal processing and transmission.The system uses Altera Cyclone series EP1C12Q24017 FPGA chip embedded Nios II 32 soft-core as a control CPU,Firstly, the solution of the Nios II system in the Doppler ultrasonic diagnostic hardware system is designed on the basic of the system function definition, and each part of the solution is explained.The system is composed of data acquisition module,asynchronous FIFO module, DMA control module FFT processing module. The analog signal is captured and converted to the digital signal by two piece of AD chip(AD7829), then digital signal is sent to the asynchronous FIFO buffer and doing FFT processing .After a sample processing, the SOC Starts the conversion of A/D and reads the conversting results are stored to FIFO module.Using Altera provides macro function modules(Megafunctions/LPM)to achieve FIFO Storage in FPGA, implemented plural FFT arithmetic based on IP core FFT V2.2.1 of Altera corporation, proposed a method of custom FFT instructions for Nios. We attempt to use the Nios soft-core processor system that can realize processing and control functions on transcranial Doppler ultrasonic diagnostic system. Therefore, it enhance Nios system real-time processing ability .The application of ultrasonic signal processing system of Nios II is a brand new measure of ultrasonic signal processing system.This paper has tremendous significance.It integrates the function of FPGA,DSP,MCU,and make SOPC possible.