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Technology And Tool Desgin Of Performance Tuning For Parallel Programing On Multi-core Platform

Posted on:2011-11-02Degree:MasterType:Thesis
Country:ChinaCandidate:J YanFull Text:PDF
GTID:2178360308955365Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Chip Multi-core (CMP) architecture has become the mainstream of processor design today. In the era of CMP, the key of transforming the increasing transistors into performance improvement is to take the advantage of multi-threading parallelism which is the nature of multi-cores. However, as shown in the past decades, parallel programming is difficult, and bad implemented programs cannot exploit the potential of hardware resources. To develop an original serial algorithm into a parallel program highly coupled with the micro-architectural characteristics of CMP hardware is actually a process of performance tuning, which needs to be done with the experience of both program flow and accompanying hardware behaviors.Performance Monitoring Unit (PMU), special units widely integrated in modern processors for accounting micro-architectural events, makes it possible to extract the data of micro-architectural characteristics in the runtime of applications with trivial overhead and interference. Based on PMU, we designed a new software tool SMART (Sampling Monitoring Analyzing and ReTuning) for program tuning. Its functions includes (1) supporting event counting and sampling in the scope of both system wide and for specified processes, (2)with the help of compilation technology, correlating the collected performance profile data to the position in the codes of application, and (3) providing the user interface of command line or graphical window of control and display.As part of the SMART project, the work and contributions of this thesis are as follow. First, we designed the software architecture of SMART, and defined function modules. SMART is divided into two parts including the user-level front end and kernel-level back end, among which the former is in charge of post-profiling data processing, interacting with user and display while the later collects data from system and hardware. Further, the back end includes Pview kernel extension which provides an interface of system call to control the low-level PMU related actions, and PEngine driver module designed for sampling function and dumping enormous sample data into user space. Second, we elaborate the internal mechanism of SMART, which is decided based on a thorough investigation to current related works, and present several significant innovations. Third, this work implemented all of the Pview kernel extension in the SMART back end. In the Linux kernel, my work extends process context with new-added pview areas recording statistical information of PMU, provides a process controlling mechanism for monitoring specified processes, and adds a new system call: pview.
Keywords/Search Tags:Performance monitoring, PMU, Multi-threaded program analysis, Performance Tuning
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