Design And Implementation Of IP Core Generator Of CORDIC

CORDIC is an algorithm employs multiple iterations to complete vector rotation which can be used to calculate many functions such as trigonometric functions, hyperbolic functions, the square root, logarithmic, exponential and so on. Because the data operations in CORDIC algorithm just contain addition, subtraction and shift which are easy to be implemented by hardware, and greatly reduces the complexity of design, so it is widely used in a variety of SoC (System On Chip). And with the scale and complexity of the circuits increasing, system designed based on reusable IP is becoming more and more popular.This paper is based on the project HiNOC, the design of the CORDIC circuits used in digital down conversion and frequency offset correction are completed first, then use the simulation tool LDV verify the functionality and implemented with FPGA. And then, after deeply study the structure and technical details of CORDIC circuit design, construct an IP core generator of CORDIC for different iteration times, different computing precision, as well as the realization structure of different applications. A flexible user-configurable consistency verification platform is also designed to verify the CORDIC soft IP.Use the platform designed in this paper, after simply set some parameters such as work modes, iteration times, pipeline stages, and so on and run the platform, uers can get a verified CORDIC module which can be used both in SOC and FPGA design. The user-configurable consistency verification platform makes CORDIC circuit design and verification can be completed at the same time, significantly reduces the design time, so the engineers can focus more on the top design level.The CORDIC circuit designed in this paper has the following advantages:(1) extends the input angle to a complete cycle via coarse rotation; (2) simplifies the computing of the correction factor of overall iterations and greatly save the resources. The platform designed in this paper has a certain nature which can used by others, for a functional circuit block which complete certain function especially the ones which are used very often, engineers can design a similar common platform based on the actual applications. Then a verified and function correct IP core can be generated in a very short period of time and used for system integration, greatly speed up the schedule of the projects.