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Design And Implementation Of Image Acquisition For High Reflection Object Based On Linear CCD

Posted on:2011-05-19Degree:MasterType:Thesis
Country:ChinaCandidate:H S SaiFull Text:PDF
GTID:2178360305450093Subject:Mechanical and electrical engineering
Abstract/Summary:
Image scanning technology has been widely used in the production and testing systems, in which the core device is the image sensor, that is, optocouplers CCD (Charged Coupled Device), the technology has evolved into broad application prospects of emerging technologies, becoming one of the most talked about hotspot in Modern optoelectronics and testing technology. As the CCD has high sensitivity, low noise, low cost, small and light characteristics. It has very wide fields of application in the defense intelligence, research, picture communication and engineering survey.The main research topic of the issue is a metal label image acquisition system using linear CCD. First, a detailed analysis of the working principle of linear CCD is made, and then the driving pulse generation circuit using CPLD is designed, then the peripheral circuits of linear CCD as well as A/D converter circuit are designed, at last the image processing system using ARM micro-controller is designed.The system is designed as follows:First the optical signal collected by the linear CCD is delivered to the instrumentation amplifier, after differential amplification processing, it is carried out into the ADC, and then the converted data is written into the dual-port RAM under control of the CPLD, at last the data is read by the ARM microprocessor and processed.The main difficulty of the system design lies in the designing of the drive timing circuit design of the linear CCD. The traditional linear CCD driving circuit design methods are as follows:direct digital circuit driver, microcontroller port driver, EPROM driver, the main driver with the IC, etc. Which have many drawbacks such as complexity of hardware, difficulty of debugging, difficulty of modification. In this paper, the CPLD is used to design the driving sequence circuit of the linear CCD which improves the reliability and flexibility of the circuit. The CPLD used in this paper is EPM240T100C5 which is made by Altera. The design of the CPLD is completed in the Quartus II development environment. After a functional simulation and timing simulation, the design is proved to be right for the demand of the linear CCD.
Keywords/Search Tags:linear CCD, CPLD, instrumentation amplifier, high-speed ADC, ARM
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