Research On Quasi-Cyclic Low-Density Parity-Check Codes

Low-density parity-check codes are a class of linear block codes which approach Shannon limit. With the development of LDPC encoder/decoder design and research, Quasi-cyclic (QC) LDPC codes are widely studied for their comparable performance and hardware-friendly characteristic. This thesis first introduces the principles of finite field LDPC codes, and then focuses on the construction of QC-LDPC codes and the design of LDPC decoder. The main work includes:1. Modified progressive edge growth (PEG) algorithm is studied to construct QC-LDPC codes with flexible structure parameters. The simulation results show that the performance of QC-LDPC codes is comparable with that of non-structured LDPC constructed by PEG algorithm over AWGN channel.2. Nonbinary structured and non-structured LDPC coes are constructed by PEG algorithm. Their performance is compared with that of binary LDPC codes with same coding rates over AWGN channel by BPSK modulation and 8PSK modulation. The performance and decoding complexity of nonbinary LDPC codes are analyzed, respectively.3. The parallel and partially parallel decoder schemes are introduced, respectively. For partially parallel decoder schemes, the storaging and routing algorithm for extrinsic message, as well as the overlapped decoding algorithm are studied. One overlapped decoding scheme is proposed, which performs approximate 100% hardware utilization.4. LDPC coding is introduced to physical network coding. Four decoding ways are presented and analyzed for XOR decoding in the butterfly multicast network.5. LDPC coded MIMO-OFDM system is studied. The coding gain of LDPC codes over multipath channel is presented by simulation.