Ring Topology Networks-on-Chip Architecture Research Based On Wormhole Routing

With the advancement of the semiconductor technology, more and more transistors can be integrated in a single chip. Nowadays this order of magnitude has grown to one billion. On the other hand, the traditional technology of single-core can not meet people's strong demand of the performance of integrated circuit gradually. Both in the domain of embedded application and general-purpose processors, multi-core has become a trend. In this context, the on-chip communication among multi-cores is becoming more and more important. One of the most important research directions is Networks-on-Chip, NoC. This technology moves traditional computer interconnection technology to the interconnection of hardware resources in a single chip.At first, this paper studied the key techniques in NoC, including topology, the mechanism of routing arbitration and switching, and so on. Further more this paper analyzed and evaluated some common solutions on these aspects. In these techniques, this paper focused on wormhole routing mechanism, analyzed the problems in it, and discussed the advantages and disadvantages of the solutions on these problems.Based on these studies, this paper presented a new ring topology NoC architecture. Based on the current technology, this architecture uses an improved virtual channel technology to eliminates the deadlock and head of line blocking in ring network, without consuming too much resource. Further more, this architecture decreases one stage of pipeline in switch node, using the characteristics of that virtual channel technology consumes less resource and is more easy to be implemented in ring topology, and reduces the transmission delay without affecting the system frequency. The results of simulation and synthesis show that this architecture has a good delay and throughput performance under a reasonable area/power consumption.