Study On The Detect-Circuit Of The Capacitive Micro-Accelerometer Sensor By Silicon

Capacitive silicon Micro-accelerometer is kind of important mechanical inertial sensor, one of basic component of measurement. Accelerometer has many applications in industry, daily life and military weapon. It has a number of advantages over the conventional accelerometers such as lower cost, smaller, lighter and so on. So researching it becomes the hotspot. Design and research detecting-circuit is one of keys about design Capacitive silicon Micro-accelerometer.Capacitive silicon Micro-accelerometer is made by bulk-micromachined process in china primarily, because of fabrication process restriction. However, ICs is made by surface micro-machined process, so accelerometer and detection circuit can not be made in one IC. The detection circuit we designed aim at accelerometer made by bulk-micromachined process to realize hybrid integration. Of course it can be used in surface-micromachined process to realize monolithic.The paper focused on the following aspects:Firstly the paper studied the structure and working-theory of the micro-accelerometer. Especially the paper introduced the structure and working-theory of the planar micro-accelerometer. And it studied the mechanical and electrics characteristic of the micro-accelerometer.Secondly systemically researching and designing the detecting-circuit. The paper mainly studied the system based on modulate and demodulation technology. The signal processing circuits were analyzed and simulated respectively with parameters of 2μm BiCMOS process provided by XFAB Company and 2μm BiCMOS process provided by the 24th Institute of China Electronics Technology Group Corporation. The circuit system consists of bias voltage source, reference current source, self-test circuit, buffer amplifier, clock generator, high frequency carrier wave generator, buffer, demodulator and so on. The output voltage signals are proportional to the acceleration signal.Finally layout design of the detection circuit. The circuit layout checked by DRC,ERC and LVS. Dummy, thermal symmetry, common centroid geometry Technologies are used for reinforcing matching. Every PAD protected by ESD circuit. Safety is guaranteed through redundancy design with superfluous complementary functions.