The Study On Electrical Characteristics Of Strained Si MOSFETs

Strained silicon technology enhances the lower mobility in bulk Si CMOS by introducing tensile or compressive stress into Si device. In addition, based on the process of Bulk Si CMOS, Strained silicon technology needs no complicated methods in process line, thus being widely applied as a cheap and efficient methodology.This thesis focuses on the strained SiGe/Si on relaxed Si/SiGe, including how the relaxed or strained SiGe/Si is formed and its physical characteristic. The structure of the strained Si surface channel MOSFET, the strained SiGe MOSFET with quantum well channel is founded. By solving the Poisson's equation at any layer, the model of threshold voltage is established, also the transconductance, leak conductance and the cut-off frequency model are presented through the above groundwork. Then the relation between the electrical parameter and the structure parameter were simulated and analyzed with using MATLAB.After that, the integrated strained CMOS was simulated by MEDICI to research on major structure parameters of device.The result from the simulation demonstrated that this novel structure is well designed and will have a promising future in the application field.