The Research Of Self-Feedback Test Generation Methods Based On Genetic Algorithm

As very Large Scale Integrated circuites technology developed to the field of deep-submicron, even nanometer, its function becomes more complicated and the integrated density increased quickly. The resulting is the complexity of digital integrated circuits to increase sharply. At the same time, the reliability requirements of digital integrated circuits in increasingly demanding, Digital integrated circuits test technology has further development and become to one of the decisive factors for ensure its reliability. This paper reviews the status of digital integrated circuit test in domestic and foreign, then focus on self-feedback test generation technology.The main work in this paper:1. Detailed description the challenges facing digital integrated circuit test today and introduce the most popular design for testability technologies. At the same time, analysis the benefits of these technologies and their limitations. Then, focuses on several commonly used test generation algorithm2. Introduced the principle and operational of genetic algorithms, analysis and research the characteristics of genetic algorithms, and described the application of genetic algorithms to test generation. In this paper, the self-feedback test generation ultimate aim is to search the best feedback combination. Genetic algorithm will be applied to search the best feedback combination in a short time.3. In this paper, research the key technologies of self-feedback test generation, and present use the sum of the response from interior node changes by adjacent vector to measure good and bad test set.4. Becase of feedback combination in a great solution space, need take some measures to reduce the search area. In this paper, multiple weighted set is applied to self-feedback test generation, limit the scope of the choosed internal nodes by weight. The experimental results on the ISCAS85 benchmark circuits, prove this method can reach high fault coverage under a short vector length.5. In this paper, re-seeding technology is applied to the feedback test generation methods. After identified a set of feedback node, Increase the feedback node's fault coverage and reduce the test length by re-seeding. The seed of re-seeding selected by genetic algorithm. The experimental results on the ISCAS85 benchmark circuits, prove this method can not to increase the case of seed and reach high fault coverage under a short vector length.