| RFID(Radio Frequency Identification) currently has been widely used at LF and HF band,while both the reader and tag are still in the stage of research and development at UHF band.According to the background of UHF RFID application and the demand of low power consumption,portable and multi-band reader,a totally integrated two stage Class-AB RF power amplifier based on SMIC 0.18μm CMOS process which can work from 860MHz to 960MHz was designed in this paper.Firstly,the paper summarizes the theories and characteristics of all kinds of power amplifiers,and provides a detailed analysis and mathematical calculation of Class-AB RF power amplifier.A brief introduction to RF power amplifier's key techniques such as linearity improvement,efficiency enhancement,stability and broadband matching is presented,and the difficulties and challenges of RF power amplifier implemented by CMOS process are also explained.According to the design specifications and the design flow of RF power amplifier, detailed design procedures of RF power amplifier's different parts are provided.An output matching network with exactly the same bandwidth as the RF power amplifier is especially designed.Careful consideration and solution for the instability of RF power amplifier are also discussed.This paper proposes two kinds of circuit level linearization techniques which are capacitor compensation technique and diode linearization technique and their detailed discussions and specific designs.Simulating results show an improvement of 17dB around both in input PldB and IIP3.Finally,the layout and post simulation of RF power amplifier are given.The two stage Class-AB RF power amplifier designed in this paper has a linear output power of 23.5dBm,a gain of 19.1dB,a power consumption of 27dBm,a maximal PAE of 48%,an linearity with input PldB andⅡP3 of 5.03dBm and 13dBm respectively when works at a supply voltage of 3.3V,and a linear output power of 15dBm,a power consumption of 18dBm when works at a supply voltage of 1.8V. |
PDF Full Text Request