Digital Class-D audio amplifiers(amps),also known as digital pulse modulation amps, features low-voltage ,low distortion operation and high power efficiency. As a consequence, digital Class-D amplifiers are increasingly prevalent in low cost high performance consumer electronics,especially for portable devices.A digital Class-D amplifier comprises a digital Pulse Width Modulation(PWM) and an output stage(and low pass filter).The digital PWM involves two steps: the sampling process and the pulse generation.The conventional sampling processes have their algorithmic complexity.As a result,the hardware is relatively complex consequently requires more power dissipation.In this paper, we propose a novel sampling process.The process does not require division or multiplication operation,features a simple circuit implementation.We analytically derive the double Fourier series expression for the process and model the Class-D amplifier in the simulink of MATLAB to verify the feasibility.The total harmonic distortion(THD) is 0.12% @10V power support,1-kHZ input,48-kHZ sampling,4Ωload.A FPGA-based Class-D audio amplifier prototype is developed and realized.The synthesis results indicate that the Class-D amplifer based on the sampling process in this paper require less hardware. As a consequence, power dissipation is reduced. |