Research Of The High-Speed Sampling System For Electrical Impedance Tomography

The technology of Electrical Impedance Tomography exploits the different electrical properties such as resistivity and permitivity in different parts of the tissues to generate a tomographic image. Typically, safe currents are injected into the human body through electrodes placed on its surface, and the resulting electrode voltages are measured.In study of EIT, involves data collection system and image reconstruction algorithm. The aim of this paper is to develop a EIT data collection system.In this paper, several usual technologys of analog demodulation and digital demodulation are analysed and compared. Then, the description of the principle of digital demodulation is given. After that, the requirements of digital demodulation for data sampling are analysed. Based on the requirements of digital demodulation to data sampling, and combined the analysis and comparison of several usual designs of EIT data collection system, this paper proposed a design for EIT high-speed sampling system.The EIT high-speed sampling system mainly consists of 4 parts, including the source of sine wave current which base on the DDS, the control for high-speed A/D sampling and the cache for data, ARM mic-controller system, and the interface of the USB communication. The integrated design of the DDS and the function of the control for high-speed A/D sampling & the cache for data is realized by using FPGA. The problem of synchronization between sampling and measured signal is solved, and improved the measuring accuracy of the digital demodulation. This paper gives the hardware designs of high-speed A/D converting circuit, high-speed D/A converting circuit, interface circuit of FPGA, ARM mic-controller system, and interface circuit of USB communication. It also gives the implementation of using FPGA to realize the integrated design of the DDS and the function of the control for high-speed A/D sampling & the cache for data by exploiting VHDL. Based on the SPI interface of ARM mic-controller, high-speed configuring FPGA in system is implemented. The experimental results are also given. Finally, this paper compendiary introduces the designs of hardware interface routine for ARM mic-controller, hardware interface and interrupt service routine for USB communication.