Design And Research Of Low Noise CMOS Operational Amplifier

CMOS Operational Amplifier (op-amp) is one of the most useful components in analog integrated circuits. But the MOS transistors are"noisy", moreover, as MOS device sizes and signal levels are aggressively scaled down, the low frequency noise (LFN) properties become increasingly important.In this dissertation, the main research is about how to decrease the noise in op-amp with classic topology and how to make tradeoff between noise and other characters such as power and speed. It starts from seeking the dominating noise sources in op-amps, then adjusts the parameters of relevant components according to the primary theory of noise, and makes tradeoff between noise and other characters.The design of a full differencial op-amp, which is used in the modulator of a Sigma-Delta ADC, is given as an example in the end. The parameters of the op-amp are obtained by simulating in Simulink environment, and then they are transformed into actual components artificially, the optimization of the noise character is carried out by validation in the end. The decrease of flicker noise is studied as an emphasis of the design. A multivariate function is created according to the expression of the spectrum density of the 1/f noise. Then both a satisfied design of the op-amp and the minimum of the pie area could be achieved by calculating the extreme point of the multivariate fuction.The research is validated by simulating with HSpice based on the HJTC 0.18μm process, and the simulation results have proved the success of the design.