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Research And Implement Of Enhacement Processing Of Infrared Image Based On FPGA Platform

Posted on:2008-02-04Degree:MasterType:Thesis
Country:ChinaCandidate:L XiaFull Text:PDF
GTID:2178360272967346Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
As more mature the uncooled infrared focal plane array detector is, the technology of thermal image is widely used in the fields of public security, fire fighting, military affairs, medical science, surveillance system and so on. More and more thermographs with their own characteristics are occurred. However, it is necessary to enhance the image because infrared thermal image have widespread shortcomings with poor goals and background contrast, fuzzy image edges and heavy noise.With the fast development of the computer technology and integrated circuit technology, not only the algorithm and system instruct of image processing area improve fast. Meanwhile, the development of large-scale programmable logic device provide a hardware- based for the real time image processing. Infrared image enhancement was realized based on FPGA platform in this project.Based on the analyse of several algorithms of digital image enhancement and the characteristic of infrared image, two infrared image enhancement algorithms fit for hardware design are presented. They are plateau equalization algorithm and enhanced high-pass filtering algorithm. Then based on the characteristic of structure of FPGA/ASIC, designing scheme of infrared image processing is put forward which has a Altera EP1C20 FPGA, two SRAM chips and USB interface chip. Design and Implement of transmit module between FPGA and SRAM, control module between FPGA and USB interface and bus switch module are done by using Verilog HDL, Modelsim and QuartusII. The implement of USB firmware programme is done on KEILC. The plateau equalization algorithm and enhanced high-pass filtering algorithm of infrared image are realized on FPGA platform using Verilog HDL and Altera IP micro function module. They are complied on QuarusII and tested on the FPGA. At last, the work is summarized and prospected.
Keywords/Search Tags:ASIC, FPGA, Infrared Image, USB, Plateau Equalization, Enhanced High-pass Filtering
PDF Full Text Request
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