Font Size: a A A

A Design Of ASIC Chip For High Speed Real-time Measurement Of Particle Track

Posted on:2019-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:X ZhangFull Text:PDF
GTID:2428330566470817Subject:Control engineering
Abstract/Summary:PDF Full Text Request
In recent years,experimental methods of nuclear physics and particle physics have been widely used.In the experiment,the electronic signal processing method is adopted to measure and analyze the energy information,position information and time information of the detector's output signal.Microchannel plate(MCP)is a multichannel electron multiplier detector with large array and high spatial resolution.It can also be used as a track detector to measure particle motion track and accurate time information.In order to improve the position resolution,the detector's readout bar is increasing,and the requirement of high speed,low noise,high integration and low power consumption is put forward for the electronic system.In order to read the track information of detected particles in real time,a higher counting rate readout system is needed.Based on the above requirements and the existing theoretical basis,an ASIC chip for the micro-channel plate detector and gas detector is designed.Using the ASIC chip,combining has been put before the chip and the FPGA based counter high-speed realtime measurement of incident particles to the probe location information,so as to realize the test of beam profile and beam position of real-time monitoring.The single channel of chip includes zero phase elimination circuit,low pass filter forming circuit,discriminating circuit and pulse shaping circuit.Chip design performance includes: four-channel integration;Dynamic range from 0.004 v to 0.5v;In the dynamic range,the linearity of the whole chip is better than 0.6%.The overall dynamic power consumption of the chip is 28 m W.The count rate is 1MCPS.The chip design adopts the CMOS process of 0.18 um,through to the schematic diagram process Angle,the monte carlo simulation and imitation after analysis of the chip layout,results showed that the linearity is better than 0.5%,and all other indexes meet the expected requirements.
Keywords/Search Tags:ASIC, position information, Polar-zero cancellation, low-pass filter
PDF Full Text Request
Related items